Time Division Multiplexing
Summary
Time Division Multiplexing (TDM) is one of important techniques for digital hardware designing. This is useful to reduce the area and resource usage in a circuit.
Overview
TDM is used to reduce the size of the circuit. Figure 1 shows the overview of TDM. Suppose, input A — D, and output A — D are data stream… for example, audio data, video data, or maybe internet traffic. Input keeps coming in, and output are usually synchronous with the input, and it keeps going out. To process data stream A — D in parallel, process units must be duplicated like upper half of Figure 1. If calculation circuit is small like an adder, this is not a problem. But if this calculation unit is large like multiplier, or divider, this will take 4 times more than the original process unit. In this case, it’s more efficient to share one process unit among 4 inputs and outputs, and route input and output data sequentially to the same unit like bottom half of Figure 1.
This is possible when;
- Input and output stream are synchronizing with slower clock, or processing unit is combinational circuit.
- Calculation for all the input are exactly the same.
For example, if input stream is audio signal, it’s synchronizing with audio clock, which is usually 44.1kHz. If it’s Hi-Fi system, it could be 96kHz, but it’s much slower than system clock (100 MHz on Zedboard). So input registers in Figure 1 are synchronizing with slower clock…in this case, audio clock, and latches data on every rising edge of audio clock. TDM circuit is synchronized with system clock, in this case, 100 MHz. How this works is this;
- Input register latches the input on rising edge of audio clock.
- TDM state machine routes input reg 1 to calculation unit.
- When calculation is done, output is latched by output reg 1.
- State machine routes input reg 2 to calculation unit, and repeat the same thing until all the input A — D are processed.
- TDM state machine will hold until next rising edge of audio clock.
That’s it!! The concept is pretty simple, yet effective.
Implementation result
Table 1 is actual synthesis report from my digital synthesizer module.
Module name “tdm_div” in a table is TDM’ed divider, and “tdm_mul” is TDM’ed multiplier. From this table, single divider uses 1798 cells, and single multiplier uses 3178 cells, however, TDM’ed divider uses about 9k cells, and TDM’ed multiplier uses about 10k cells, even there are 32 x 32 bits inputs and outputs. This is much less area compared to 32 times original divider and multiplier.
