Figure 1. Hardware block design in Vivado


In this section, the focus will be on generating synthesizer hardware bitstream for Zedboard. Entire system overview including software architecture is explained here.

Designing digital musical synthesizer on Zedboard

Detail of the synthesizer hardware design is explained below.

Digital Synthesizer Hardware Design

Also, designed hardware Verilog source code is available…

Figure 1. Synthesizer block diagram


VCA (Voltage Controlled Oscillator) controls the amplitude/volume of the tone. It’s not just the velocity of the note, but it changes the volume time to time, to simulate the actual musical instruments. To make this happen, EG (Envelope Generator) is also used. …

Figure 1. Synthesizer block diagram


In this section, I’ll explain the design of the VCO (Voltage Controlled Oscillator) in synthesizer hardware. VCO basically is a wave generator. Overview of the synthesizer hardware is explained below.

Digital Synthesizer Hardware Design

Wave generation

Figure 2 shows various wave types which can be generated by this VCO.

Figure 1. Block diagram of digital synthesizer


In this section, the focus will be on hardware design specifically on digital musical synthesizer.


In this section, both hardware and software implementation of Zedboard digital musical synthesizer will be explained. Each chapter (“Hardware Designing” and “Software Designing”) will have links to design overview, and details of each component design.

In this article, what are already existing, and what are newly added will be explained…

Figure 1. State machine overview


Digital hardware are composed of 2 different kinds of components;

  1. Combinational Logic
  2. State machine

State machine is quite important to make complicated hardware like multiplier, divider, control logic of the processor (CPU), and so on. …

Figure 1. Overview of the time division multiplexing


Time Division Multiplexing (TDM) is one of important techniques for digital hardware designing. This is useful to reduce the area and resource usage in a circuit.


TDM is used to reduce the size of the circuit. Figure 1 shows the overview of TDM. Suppose, input A — D, and output…

Figure1. Division


In this section, how digital divider calculates quotient and remainder will be explained. Also, how this can be implemented on FPGA will be shown with some experimental results.

Binary division

Figure 1 shows the decimal division calculation. How decimal division works is like below.

  • Compare each digit of dividend with divisor, and…

Figure1. Binary multiplication


I needed to design 32-bit multiplier for another personal project. So I googled and did some experiments with multipliers on FPGA (Zedboard). I’ll show the results of my experiments.

Binary multiplication overview

Figure 1 shows decimal and binary product calculation. First example is calculation in decimal (1234 X 5678). …

Simulation of multiplier


In this chapter, I’ll explain how the computer hardware is calculating “a - b”. To understand how subtractor works, binary adder has to be understood. This is explained in the past article.

How the computer calculates “a + b”

Decimal subtraction

In the computer hardware, subtraction is calculated differently. …

Yuhei Horibe

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